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Ieee Standard Microcomputer System Bus - ANSI/lEEE Std 796-1983 by IEEE is a reference work available to read on EtoBox.
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1 General 9 1.1 Scope 9 1.2 Object 9 1.3 Definitions 10 General System Terms 10 Signals and Paths 10 2 FunctionalDescription 10 2.1.2 Slaves 11 2.1.3.1.1 ClockLines 12 Command Lines MWTC*. MRDC IOW IORC*) 12 Transfer Acknowledge Line (XACK*) 12 2.1.3.2 Address and Inhibit Lines 12 2.1.3.2.1 Address Lines (A0 - A23*) 13 Byte High Enable Lhe (BHEN*) 13 Inhibit Lines (INHl* and INH2*) 13 Data Lines (DO* - D15*) 13 2.1.3.4 Interrupt Lines 13 Interrupt Request Lines (INTO* - INT7*) 13 Interrupt Acknowledge (INTA*) 13 Bus Exchange Lines 13 2.1.3.5.1 Bus Request (BREQ*) 13 Bus Priority (BPRN* and BPRO*) 13 Bus Busy (BUSY*) 13 Common Bus Request (CBRQ*) 13 Data Transfer Operation 14 Data Transfer Overview 14 2.2.2 Signal Descriptions 15 Initialize (INIT*) 15 Constant Clock (CCLK*) 15 Address Lines (AO* - A23*) ; 15 IEEE Std 796 Bus Commands 18 2.2.2.5.1 Read Operation 18 2.2.2.5.2 Write Operation 18 Transfer Acknowledge (XACK*) 19 Inhibit (INH1 and INH2*) 19 2.2.2.8 Lock(LOCK*) 21 2.3 Interrupt Operations 22 2.3.1 Interrupt Signal Lines 22 Interrupt Request Lines (INTO* - IN'I"7*) 22 Interrupt Acknowledge (INTA*) 22 Classes of Interrupt Implementation 22 Non-Bus Vectored Interrupts 22 Bus
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