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Proceedings of the 23rd symposium on Integrated circuits and system design - SBCCI '10 - A high speed, highly linear CMOS fully differential track and hold circuit by Haddadi Nejad, Shaahin; Daie Kouzekanani, Ziaaddin; Sobhi, Jafar; Salami Fard, Iman; Ghanbari, Kuresh is a scholarly article available to read on EtoBox.

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A fully differential high speed and highly linear CMOS Trackand-Hold amplifier (THA) that was used in front end of an Pipline ADC is described here. The architecture of Track-and-Hold based on an open-loop architecture with Miller hold capacitance. The Track-and-Hold circuit consists of an op-amp with low impedance nodes and properly voltage gain and bootstrapped switches . Designed circuit is simulated in a standard 0.35 um CMOS technology, the THA achieves -75.7 dB THD (Total Harmonic Distortion) for 1.6 Vp-p , 86 MHz input at 320 MHz sampling rate. The circuit design of major building blocks is described in details. ## Categories and Subject Descriptors B.7.1 [Integrated Circuits]: Types and Design Stylesinput/output circuits.

Author
Haddadi Nejad, Shaahin; Daie Kouzekanani, Ziaaddin; Sobhi, Jafar; Salami Fard, Iman; Ghanbari, Kuresh
Publisher
ACM Press
Published
2010
Language
EN

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