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2014 International Conference on Electronics and Communication Systems (ICECS) - Parallel multiplier-accumulator based on radix-2 modified Booth algorithm by using a VLSI architecture by Sathya, A.; Fathimabee, S.; Divya, S. is a scholarly article available to read on EtoBox.

Author
Sathya, A.; Fathimabee, S.; Divya, S.
Publisher
IEEE
Published
2014
Language
EN

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