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2021 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS) by Urabe, Takaki (author);Ochi, Hiroyuki (author);Kobayashi, Kazutoshi (author) is a nonfiction available to read on EtoBox.

What is 2021 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS) about?

In this paper, we propose a nonvolatile SRAM (NVSRAM) using the Fishbone-in-Cage Capacitor (FiCC) fabricated in a 0.18μm CMOS process technology. The FiCC can be implemented with metal wires as same as a metal-insulator-metal (MIM) capacitor that can be fabricated with a standard CMOS process technology. Three transistors and an FiCC are added to a conventional 6-transistor SRAM for non-volatile operations with 42% area overheads. Assuming 5 minutes active time per hour, the proposed NVSRAM can reduce 61.8% of power consumption compared with a standard SRAM. The fabricated NVSRAM can operate correctly as an SRAM at 100 MHz and perform nonvolatile store and restore operations by using the FiCC.

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Author

Urabe, Takaki (author);Ochi, Hiroyuki (author);Kobayashi, Kazutoshi (author)

Publisher

IEEE

Published

2021

Language

EN

Category

nonfiction