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Power-efficient, Reliable Microprocessor Architectures: Modeling and Design Methods by Pradip Bose; Alper Buyuktosunoglu; Chen-Yong Cher; John A. Darringer; Meeta S. Gupta; Hendrik Hamann; Hans Jacobson; Prabhakar N. Kudva; Eren Kursun; Niti Madan; Indira Nair; Jude A. Rivers; Jeonghee Shin; Alan J. Weger; Victor Zyuban is a scholarly article available to read on EtoBox.

What is Power-efficient, Reliable Microprocessor Architectures: Modeling and Design Methods about?

Next generation system designs are challenged by multiple "walls": among them, the inter-related impediments offered by power dissipation limits and reliability are particularly difficult ones that all current chip/system design teams are grappling with. In this paper, we first describe the attendant challenges in integrated (multidimensional) pre-silicon modeling and the solution approaches being pursued. Later, we focus on leading edge solutions for power, thermal and failure-rate mitigation that have been proposed in our R&D work over the past decade.

Author

Pradip Bose; Alper Buyuktosunoglu; Chen-Yong Cher; John A. Darringer; Meeta S. Gupta; Hendrik Hamann; Hans Jacobson; Prabhakar N. Kudva; Eren Kursun; Niti Madan; Indira Nair; Jude A. Rivers; Jeonghee Shin; Alan J. Weger; Victor Zyuban

Publisher

ACM

Published

2010

Language

EN