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The Circuits and Robust Design Methodology of the Massively Parallel Processor Based on the Matrix Architecture by Noda, H.; Tanizaki, T.; Gyohten, T.; Dosaka, K.; Nakajima, M.; Mizumoto, K.; Yoshida, K.; Iwao, T.; Nishijima, T.; Okuno, Y.; Arimoto, K. is a Engineering article available to read on EtoBox.

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Author
Noda, H.; Tanizaki, T.; Gyohten, T.; Dosaka, K.; Nakajima, M.; Mizumoto, K.; Yoshida, K.; Iwao, T.; Nishijima, T.; Okuno, Y.; Arimoto, K.
Publisher
IEEE; Institute of Electrical and Electronics Engineers; Institute of Electrical and Electronics Engineers (IEEE) (ISSN 0018-9200)
Published
2007
Language
EN
Field
Engineering (Physical Sciences)

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Browse all works by Noda, H.; Tanizaki, T.; Gyohten, T.; Dosaka, K.; Nakajima, M.; Mizumoto, K.; Yoshida, K.; Iwao, T.; Nishijima, T.; Okuno, Y.; Arimoto, K.