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Efficient Compilation in VLSI Design by Sachin Puranik is a document available to read on EtoBox.

What is Efficient Compilation in VLSI Design about?

This document is a manuscript submission to a journal about a new compilation approach to improve re-compilation time and efficient use of resources in industry standard tools. It describes the submission as an original research article and provides details about the lead author and their contribution. The work proposes a unique partition and session ID based compilation method that could significantly reduce compile time and optimize storage use in VLSI design verification processes.

Author

Sachin Puranik

Language

EN