About this document
Dynamic Power Analysis for Custom Macros by Anonymous G1iPoNOK is a document available to read on EtoBox.
The document describes a methodology for estimating power consumption of custom macros using ESP-CV simulation. Key steps include: 1) Generating a Verilog test bench from a top-level simulation to drive the macro. 2) Simulating the macro schematic as switch-level Verilog using ESP-CV for fast runtimes. 3) Calculating activity factors from the simulation and combining with capacitances to estimate power using a first-order equation.
- Author
- Anonymous G1iPoNOK
- Language
- EN