About this document
VHDL FSM Design Best Practices by anup_sky88 is a document available to read on EtoBox.
This document describes finite state machines and modeling them in VHDL. It provides an example of a serial transmitter that follows the RS-232 protocol. The transmitter sends a start bit, 8 data bits, optional parity, a stop bit, and can operate at baud rates of 9600, 4800, 38400, and 115200. The document shows the state diagram for the transmitter and discusses general schemes for modeling FSMs in VHDL, including using an enumerated type for states and signals to represent the current and next states. It
- Author
- anup_sky88
- Language
- EN