Skip to content

Opening book details…

Can I read A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations on EtoBox?

A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations by Ehud Finkelstein; Shlomo Weiss is a Computer Science article available to read on EtoBox.

What is A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations about?

We describe a simulation environment that allows us to simulate the standard peripheral component interconnect (PCI) bus protocol, as well as modified PCI protocols. While there are standard benchmarks (such as the SPEC [IEEE Comput. 33 (7) (2000) 28] benchmarks) available for processor simulation, database system simulation, and now even for simulating embedded systems (from EDN Embedded Microprocessor Benchmarking Consortium, EEMBC, http:// www.eembc.org), there are no standard benchmarks for simulating computer buses in general and specifically, for simulating the PCI bus. To address this problem we describe a methodology for gathering information about the PCI traffic from a real system, and to use this information in order to generate PCI cycles that drive the simulator for both standard and modified PCI protocols. Finally, we use the simulation environment to run experiments with various parameters of the standard PCI protocols, and an extension that involves transferring a hint about the expected latency on the data bus at the time the target ends the current burst transaction.

Who reads A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations?

It is typically read by researchers, students, and practitioners in Computer Science.

Author
Ehud Finkelstein; Shlomo Weiss
Publisher
Elsevier Science; Elsevier ; Elsevier BV (ISSN 1383-7621)
Published
2002
Language
EN
Field
Computer Science (Physical Sciences)

More by Ehud Finkelstein; Shlomo Weiss

Browse all works by Ehud Finkelstein; Shlomo Weiss