About this document

STLD II-Mid Exam Questions for ECE & EEE by harika_neeharika is a document available to read on EtoBox.

This document contains 4 questions related to digital logic design topics for an exam. Question 1 asks to implement a combinational circuit using a PLA and lists the functions and compares PROM, PLA and PAL. Question 2 asks to realize a Boolean function using T-gates. Question 3 asks to explain JK and D flip-flops with their truth tables. Question 4 asks to explain what a merger graph is and provide an example, and also explain ASM symbols and notations with one example.

Author

harika_neeharika

Language

EN