About this document

DCF Lab: Shift Register Verification by Kunal N Jain is a document available to read on EtoBox.

This document contains 4 sections that describe and verify different modes of a shift register circuit using D flip-flops: - Serial In Serial Out mode shifts data in serially and outputs it serially as verified by a truth table. - Serial In Parallel Out mode accepts data serially but outputs it in parallel form as shown by the truth table. - Parallel In Parallel Out mode has no serial shifting as input and output to each flip-flop is separate as indicated by the truth table. - Parallel In Serial Out mode

Author

Kunal N Jain

Language

EN