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Output by Valeriu Codreanu is a document available to read on EtoBox.
Traditional vector architectures have shown to be very effective for regular codes. This SIMD parallelism is also present in irregular or pointer-rich codes. The proposed microarchitecture extension applied to a 4-way issue superscalar processor is 19% faster than the,same processor with 4 scalar buses to Ll data cache.
- Author
- Valeriu Codreanu
- Language
- EN