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2019 IEEE East-West Design & Test Symposium (EWDTS) - A Technique for the Accounting of Surrounding Circuitry During Generation of the Simplified Models by Gourary, Mark M.; Rusakov, Sergey G.; Ulyanov, Sergey L.; Zharov, Michael M. is a scholarly article available to read on EtoBox.

What is 2019 IEEE East-West Design & Test Symposium (EWDTS) - A Technique for the Accounting of Surrounding Circuitry During Generation of the Simplified Models about?

The problem of decreasing the redundancy of model order reduction (MOR) techniques in circuit simulation is discussed. It is shown that further progress in decreasing the redundancy of the reduced models can be achieved by taking into account the characteristics of the circuit environment of the original models. Some experimental results are presented.

Author

Gourary, Mark M.; Rusakov, Sergey G.; Ulyanov, Sergey L.; Zharov, Michael M.

Publisher

IEEE

Published

2019

Language

EN