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What is Reinforcement Learning for Chip Design about?

This work proposes a new graph placement method using reinforcement learning for chip floorplanning. The method generates manufacturable chip floorplans automatically in under 6 hours, compared to months of work by human experts using previous methods. It formulates chip floorplanning as a sequential decision process which allows constraints to be incorporated more easily. The reinforcement learning agent places blocks one by one, receiving rewards based on wirelength, congestion and density, and learns to

Author

Liat Bar

Language

EN