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What is PS/2 Keyboard and Display Interface Design about?

This document describes an assignment to interface a PS/2 keyboard to a 7-segment display using a FPGA. Students are tasked with designing 4 Verilog modules - a clock divider, shift register, 7-segment decoder, and digit multiplexer. The modules will be connected in a schematic and tested before downloading to a Basys board to demonstrate keyboard input displayed on the 7-segment display. The deliverables are Verilog code, testbenches, and a demonstration of a working hardware implementation by April 19th.

Author

pranjal

Language

EN