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What is VHDL Feature Extraction for PANDA Calorimeter about?

This document describes the VHDL implementation of a feature-extraction algorithm for processing signals from the electromagnetic calorimeter (EMC) of the PANDA detector. The algorithm was implemented on a Xilinx Spartan 3 FPGA to allow for online data processing. Test signals were obtained from a PANDA-EMC prototype using both discrete preamplifiers and ASIC preamplifiers. The FPGA implementation produced pulse amplitude and timing resolution measurements that were consistent with offline software analyses

Author

josmel

Language

EN