About this scholarly article

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. - 1.047GHz, 1.2V, 90nm CMOS, 2-Way VLIW DSP Core Using Saturation Anticipator Circuit by Suzuki, H.; Takata, H.; Shinohara, H.; Teraoka, E.; Matsuo, M.; Yoshida, T.; Sato, H.; Honda, N.; Masui, N.; Shimizu, T. is a scholarly article available to read on EtoBox.

Author

Suzuki, H.; Takata, H.; Shinohara, H.; Teraoka, E.; Matsuo, M.; Yoshida, T.; Sato, H.; Honda, N.; Masui, N.; Shimizu, T.

Publisher

IEEE

Published

2006

Language

EN