About this scholarly article

2014 IEEE International Symposium on Circuits and Systems (ISCAS) - A 2.5GHz ADPLL with PVT-insensitive ΔΣ dithered time-to-digital conversion by utilizing an ADDLL by Li, Yanfeng; Xu, Ni; Rhee, Woogeun; Wang, Zhihua is a scholarly article available to read on EtoBox.

Author

Li, Yanfeng; Xu, Ni; Rhee, Woogeun; Wang, Zhihua

Publisher

IEEE

Published

2014