Can I read UVM Verification of RISC-V Processor on EtoBox?

UVM Verification of RISC-V Processor by aarti10prajapati is a document available to read on EtoBox.

What is UVM Verification of RISC-V Processor about?

This project report details the verification of a 5-stage pipelined RISC-V processor using Universal Verification Methodology (UVM), focusing on functional correctness and hazard handling. The report includes a comprehensive test plan, methodology, implementation details, and results, highlighting the identification of RTL issues and achieving 100% functional coverage. Future work may involve performance testing and extending verification to multi-core systems.

Author

aarti10prajapati

Language

EN