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Optimal Wiring Topology for Electromigration Avoidance Considering Multiple Layers and Obstacles by Iris H.-R. Jiang; Hua-Yu Chang; Chih-Long Chang is a scholarly article available to read on EtoBox.

What is Optimal Wiring Topology for Electromigration Avoidance Considering Multiple Layers and Obstacles about?

Due to excessive current densities, electromigration may trigger a permanent open-or short-circuit failure in signal wires or power networks in analog or mixed-signal circuits. As the feature size keeps shrinking, this effect becomes a key reliability concern. Hence, in this paper, we focus on wiring topology generation for avoiding electromigration at the routing stage. Prior works tended towards heuristics; on the contrary, we first claim this problem belongs to class P instead of class NP-hard. Our breakthrough is, via the proof of the greedy-choice property, we successfully model this problem on a multi-source multi-sink flow network and then solve it by a strongly polynomial time algorithm. Experimental results prove the effectiveness and efficiency of our algorithm.

Author

Iris H.-R. Jiang; Hua-Yu Chang; Chih-Long Chang

Publisher

ACM

Published

2010

Language

EN