About this scholarly article

[1991] Proceedings Fourth Annual IEEE International ASIC Conference and Exhibit - Incremental timing optimization during multiple stages of logic synthesis by Nishio, S.; Kitahara, T.; Sekine, M. is a scholarly article available to read on EtoBox.

Author

Nishio, S.; Kitahara, T.; Sekine, M.

Publisher

IEEE

Published

1991

Language

EN