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A gate-tunable artificial synapse based on vertically assembled van der Waals ferroelectric heterojunction by Yaning Wang; Wanying Li; Yimeng Guo; Xin Huang; Zhaoping Luo; Shuhao Wu; Hai Wang; Jiezhi Chen; Xiuyan Li; Xuepeng Zhan; Hanwen Wang is a Engineering article available to read on EtoBox.

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Memtransistor, a multi-terminal device that combines both the characteristics of a memristor and a transistor, has been intensively studied in two-dimensional layered materials (2DLM), which show potential for applications in such as neuromorphic computation. However, while often based on the migration of ions or atomic defects in the conduction channels, performances of memtransistors suffer from the poor reliability and tunability. Furthermore, those known 2DLM-based memtransistors are mostly constructed in a lateral manner, which hinders the further increasing of the transistor densities per area. Until now, fabricating non-atomic-diffusion based memtransistors with vertical structure remains challenging. Here, we demonstrate a vertically-integrated ferroelectric memristor by hetero-integrating the 2D ferroelectric materials CuInP2S6 (CIPS) into a graphite/CuInP2S6/MoS2 vertical heterostructure. Memristive behaviour and multi-level resistance states were realized. Essential synaptic behaviours including excitatory postsynaptic current, paired-pulse-facilitation, and spike-amplitude-dependent plasticity are successfully mimicked. Moreover, by applying a gate potential, the memris

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Author

Yaning Wang; Wanying Li; Yimeng Guo; Xin Huang; Zhaoping Luo; Shuhao Wu; Hai Wang; Jiezhi Chen; Xiuyan Li; Xuepeng Zhan; Hanwen Wang

Publisher

Elsevier BV

Published

2022

Language

EN

Field

Engineering (Physical Sciences)