About this scholarly article

2012 IEEE Asian Solid State Circuits Conference (A-SSCC) - A successive cancellation decoder ASIC for a 1024-bit polar code in 180nm CMOS by Mishra, A.; Raymond, A. J.; Amaru, L. G.; Sarkis, G.; Leroux, C.; Meinerzhagen, P.; Burg, A.; Gross, W. J. is a scholarly article available to read on EtoBox.

Author

Mishra, A.; Raymond, A. J.; Amaru, L. G.; Sarkis, G.; Leroux, C.; Meinerzhagen, P.; Burg, A.; Gross, W. J.

Publisher

IEEE

Published

2012