About this document
VLSI Implementation of Power Efficient 4-Bit Flash ADC by Lohit Dalal is a document available to read on EtoBox.
The document presents a design and implementation of a power-efficient 4-bit Flash Analog-to-Digital Converter (ADC) using VLSI technology, specifically targeting low power consumption and high-speed performance. The proposed ADC utilizes a resistor ladder network for reference voltage generation and employs advanced comparator and encoding techniques to enhance efficiency. Simulation results are obtained using Cadence Virtuoso tools, demonstrating the ADC
- Author
- Lohit Dalal
- Language
- EN