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NDPage: Efficient Address Translation for Near-Data Processing Architectures via Tailored Page Table by Jiang, Qingcai; Tu, Buxin; An, Hong is a scholarly article available to read on EtoBox.

What is NDPage: Efficient Address Translation for Near-Data Processing Architectures via Tailored Page Table about?

Near-Data Processing (NDP) has been a promising architectural paradigm to address the memory wall problem for data-intensive applications. Practical implementation of NDP architectures calls for system support for better programmability, where having virtual memory (VM) is critical. Modern computing systems incorporate a 4-level page table design to support address translation in VM. However, simply adopting an existing 4-level page table in NDP systems causes significant address translation overhead because (1) NDP applications generate a lot of address translations, and (2) the limited L1 cache in NDP systems cannot cover the accesses to page table entries (PTEs). We extensively analyze the 4-level page table design in the NDP scenario and observe that (1) the memory access to page table entries is highly irregular, thus cannot benefit from the L1 cache, and (2) the last two levels of page tables are nearly fully occupied. Based on our observations, we propose NDPage, an efficient page table design tailored for NDP systems. The key mechanisms of NDPage are (1) an L1 cache bypass mechanism for PTEs that not only accelerates the memory accesses of PTEs but also prevents the polluti

Author

Jiang, Qingcai; Tu, Buxin; An, Hong

Published

2025

Language

EN