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Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions by Tuğrul, Yahya Can; Yağlıkçı, A. Giray; Yüksel, İsmail Emir; Olgun, Ataberk; Canpolat, Oğuzhan; Bostancı, Nisa; Sadrosadati, Mohammad; Ergin, Oğuz; Mutlu, Onur is a scholarly article available to read on EtoBox.

What is Understanding RowHammer Under Reduced Refresh Latency: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions about?

RowHammer is a major read disturbance mechanism in DRAM where repeatedly accessing (hammering) a row of DRAM cells (DRAM row) induces bitflips in physically nearby DRAM rows (victim rows). To ensure robust DRAM operation, state-of-the-art mitigation mechanisms restore the charge in potential victim rows (i.e., they perform preventive refresh or charge restoration). With newer DRAM chip generations, these mechanisms perform preventive refresh more aggressively and cause larger performance, energy, or area overheads. Therefore, it is essential to develop a better understanding and in-depth insights into the preventive refresh to secure real DRAM chips at low cost. In this paper, our goal is to mitigate RowHammer at low cost by understanding the impact of reduced preventive refresh latency on RowHammer. To this end, we present the first rigorous experimental study on the interactions between refresh latency and RowHammer characteristics in real DRAM chips. Our experimental characterization using 388 real DDR4 DRAM chips from three major manufacturers demonstrates that a preventive refresh latency can be significantly reduced (by 64%). To investigate the impact of reduced preventive re

Author

Tuğrul, Yahya Can; Yağlıkçı, A. Giray; Yüksel, İsmail Emir; Olgun, Ataberk; Canpolat, Oğuzhan; Bostancı, Nisa; Sadrosadati, Mohammad; Ergin, Oğuz; Mutlu, Onur

Published

2025

Language

EN