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Fixed-Point Processing of the SAR Back-Projection Algorithm on FPGA by Don Lahiru Nirmal Hettiarachchi; Eric J. Balster is a Engineering article available to read on EtoBox.

What is Fixed-Point Processing of the SAR Back-Projection Algorithm on FPGA about?

Time-domain back-projection (BP) is a widely known method used in synthetic aperture radar (SAR) image formation. Despite its advantages over other image formation algorithms, the BP method is hindered due to its computational complexity and its requirement of higher number of operations and processing power. Recently, field-programmable gate array (FPGA) devices have been used for BP acceleration mainly due to their parallel processing capabilities, reconfigurability, scalability, and low power requirement. This article presents a new fixed-point based BP (FxBP) design for FPGA devices and a floating-point-based BP (FlBP) design to compare performance. Both designs are developed with N-dimensional range (NDR) structure and single-work item (SWI) structure using OpenCL. The FPGA performance is evaluated using an FPGA performance metric. It is shown that FxBP-NDR and FxBP-SWI designs generate high-quality backprojected images compared to FlBP designs, while saving 16.87% and 42.54% on logic resources and gaining 17.90% and 91.62% on FPGA performance in NDR and SWI, respectively. Obtained results clearly indicate that FPGA devices perform significantly better with FxBP designs compar

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Author

Don Lahiru Nirmal Hettiarachchi; Eric J. Balster

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Published

2021

Language

EN

Field

Engineering (Physical Sciences)