Can I read VLSI Floor Planning Techniques on EtoBox?
VLSI Floor Planning Techniques by Janani Munisamy is a document available to read on EtoBox.
What is VLSI Floor Planning Techniques about?
The document discusses floor planning in VLSI physical design. Floor planning involves determining the approximate locations of circuit modules on the silicon chip layout surface. It is analogous to designing a building floor plan. The goals are to minimize the total chip area and wire lengths between modules. Floor planning partitions a large netlist into smaller pieces to simplify the physical design process. It differs from placement by allowing flexible block shapes and pin locations.
- Author
- Janani Munisamy
- Language
- EN