Can I read Verilog Exercises for Digital Logic Design on EtoBox?

Verilog Exercises for Digital Logic Design by Raffi Sk is a document available to read on EtoBox.

What is Verilog Exercises for Digital Logic Design about?

1. A full subtractor module is described with Verilog including I/O ports and logic equations for the difference (D) and borrow (B) outputs. It is instantiated and tested with all input combinations from a truth table. 2. A 4-bit magnitude comparator module is described with Verilog to compare two 4-bit inputs A and B bit-by-bit using an intermediate xnor variable and logic equations for outputs indicating if A is greater than, less than, or equal to B. 3. A 4-bit synchronous counter module is described

Author

Raffi Sk

Language

EN