About this scholarly article

Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146) - Built-in test pattern generation for high-performance circuits using twisted-ring counters by Chakrabarty, K.; Murray, B.T.; Iyengar, V. is a scholarly article available to read on EtoBox.

Author

Chakrabarty, K.; Murray, B.T.; Iyengar, V.

Publisher

IEEE Comput. Soc

Published

1999