About this document

Cadence Inverter Design Tutorial by ksangeethasri is a document available to read on EtoBox.

This tutorial guides users through the process of designing and simulating a CMOS inverter using Cadence tools, including creating a schematic, layout, and performing DRC and LVS checks. It emphasizes the importance of comparing schematic and layout simulations to identify differences due to parasitics. The tutorial concludes with post-layout simulation and highlights the learning curve associated with these design processes.

Author

ksangeethasri

Language

EN