About this document
NVL 09.low Power Pulse Triggered Flip Flop Design by sivakumarb92 is a document available to read on EtoBox.
The document describes a low-power flip-flop design based on a signal feed-through scheme. It aims to solve problems in conventional pulse-triggered flip-flop designs to achieve better speed and power performance. The proposed design outperforms previous designs based on simulation results using a 90-nm technology.
- Author
- sivakumarb92
- Language
- EN