About this document
Low Power BIST for UART Testing by vvrvvrvvr52 is a document available to read on EtoBox.
The paper discusses a Built-in Self Test (BIST) architecture using a Bit Swapping Linear Feedback Shift Register (BS-LFSR) for testing Universal Asynchronous Receiver Transmitters (UART). This approach reduces power consumption and hardware requirements while maintaining randomness in test pattern generation, leading to high fault coverage. The tools used for simulation and synthesis include MODELSIM and XILINX-ISE.
- Author
- vvrvvrvvr52
- Language
- EN