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What is Program Disturb in SuperFlash Technology about?

The document discusses the program disturb mechanism in the 65 nm embedded split-gate SuperFlash technology, highlighting the performance degradation observed during evaluations. It identifies trap-assisted tunneling in the thin core oxide as the driving factor behind this issue and presents corrective actions taken to improve performance. The findings emphasize the importance of voltage management during programming operations to mitigate unintended disturb effects on non-selected bitcells.

Author

4z5wvf4jxy

Language

EN