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A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC With Gain and Offset Calibrations by Yanbo Zhang; Jin Zhang; Shubin Liu; Ruixue Ding; Yan Zhu; Chi-Hang Chan; Rui P. Martins is a Engineering article available to read on EtoBox.

What is A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC With Gain and Offset Calibrations about?

This article presents a second-order successive approximation register (SAR)-assisted noise-shaping (NS) pipeline analog-to-digital converter (ADC) with optimized noise transfer function (NTF) zeros, background inter-stage gain, and offset calibrations. The NS, realized with an error-feedback (EF) structure, takes place in the second stage of the pipeline. A single amplifier, utilized for residue handover, realizes the EF and the optimized zeros. Copies of the EF capacitors allow their rotation role for residue saving, feedback, and sampling operations, thus omitting the extra phase for the EF operation. While further incorporating a coarse SAR ADC and partial interleaving techniques, the prototype can run at high speed with low power and strong in-band noise suppression. A splitover-time architecture with level-shift-based gain calibration is introduced to ensure the robustness of the ADC, whose hardware also facilitates the offset calibration. Besides, the split secondstage ADCs also share a single comparator, thus enabling a mismatch error insensitive split-ADC architecture with a fast convergence speed of 4000 cycles. Fabricated in 28 nm CMOS, the ADC prototype runs at a 260 MH

Who reads A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC With Gain and Offset Calibrations?

It is typically read by researchers, students, and practitioners in Engineering.

Author
Yanbo Zhang; Jin Zhang; Shubin Liu; Ruixue Ding; Yan Zhu; Chi-Hang Chan; Rui P. Martins
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Published
2022
Language
EN
Field
Engineering (Physical Sciences)

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