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What is Temperature Analysis in Stacked ICs about?

The document analyzes temperature distributions in stacked integrated circuits (ICs) with an experimental test structure and thermal simulations. The test structure consists of a top-tier chip attached to a bottom dummy chip, with the top-tier chip containing 24 sensor blocks that measure temperature at varying distances from an on-chip heater. Experiments were conducted with top-tier chips of varying thickness under constant and pulsed heating. Temperature was found to decrease with distance and be proport

Author

Hemanth Ghosh

Language

EN