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Instruction Path Coprocessors by Yuan Chou; John Paul Shen is a Computer Science article available to read on EtoBox.

What is Instruction Path Coprocessors about?

__This paper presents the concept of an Instruction Path Coprocessor (I-COP), which is a programmable on-chip coprocessor, with its own mini-instruction set, that operates on the core processor's instructions to transform them into an internal format that can be more efficiently executed. It is located off the critical path of the core processor to ensure that it does not negatively impact the core processor's cycle time or pipeline depth. An I-COP is highly versatile and can be used to implement different types of instruction transformations to enhance the IPC of the core processor. We study four potential applications of the I-COP to demonstrate the feasibility of this concept and investigate the design issues of such a coprocessor. A prototype instruction set for the I-COP is presented along with an implementation framework that facilitates achieving high I-COP performance. Initial results indicate that the I-COP is able to efficiently implement the trace cache fill unit as well as the register move, stride data prefetching and linked data structure prefetching trace optimizations.__

Who reads Instruction Path Coprocessors?

Author

Yuan Chou; John Paul Shen

Publisher

ACM

Published

2000

Language

EN

Field

Computer Science (Physical Sciences)