About this scholarly article

Proceedings of the IEEE 2013 Custom Integrated Circuits Conference - A 1.2 pJ/b 6.4 Gb/s 8+1-lane forwarded-clock receiver with PVT-variation-tolerant all-digital clock and data recovery in 28nm CMOS by Chen, Shuai; Li, Hao; Yang, Liqiong; Yang, Zongren; Hu, Weiwu; Chiang, Patrick Yin is a scholarly article available to read on EtoBox.

Author

Chen, Shuai; Li, Hao; Yang, Liqiong; Yang, Zongren; Hu, Weiwu; Chiang, Patrick Yin

Publisher

IEEE

Published

2013