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Realization of a new PMOS transistors based first-order delay equalizer suitable for communication networks by Bhartendu Chaturvedi; Jitendra Mohan; Shiv Narain Gupta is a Engineering article available to read on EtoBox.

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In this paper, a novel first-order delay equalizer based on a PMOS transistor is proposed which is highly suitable for the communication systems and networks. The core circuit consists of three unity-gain PMOS inverting amplifiers, one resistor and one capacitor. The proposed newly phase-shifter (PS) has ability to provide both inverting all pass (I-AP) and non-inverting all pass (NI-AP) responses simultaneously from the same structure without restriction of any matching of passive elements to achieve desired performance. High input and low output impedances enable cascadability in the proposed circuit. The circuit's behaviour under loading effects and the effect of parasitic components are also examined in detail. To assess the applicability of the proposed structure, nth-order delay equalizer is also presented. The performance of the proposed work is being validated through PSPICE simulations utilizing TSMC 0.18 μm level-7 CMOS technology process parameters, with voltage levels set at ±0.9 V. Furthermore, real-time post-layout verification is being carried out to ensure the confirmed performance.

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Author

Bhartendu Chaturvedi; Jitendra Mohan; Shiv Narain Gupta

Publisher

Elsevier BV

Published

2023

Field

Engineering (Physical Sciences)