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What is Deep Learning Binary Neural Network On An FPGA about?

This thesis presents the implementation of a binary neural network on an FPGA, aimed at reducing computational complexity and memory requirements for real-time computer vision applications. The architecture utilizes binary weights and activations, achieving a processing speed of 332,164 images per second with an accuracy of approximately 86.06% on the CIFAR-10 dataset. The work highlights the advantages of using FPGAs for low-power, embedded applications, particularly in the context of Advanced Driver Assis

Author

AHMET ÇINAR

Language

EN