About this document
TMS320C5x DSP Processor Architecture by John cena is a document available to read on EtoBox.
The document describes the TMS320C5x family of digital signal processors from Texas Instruments. It has a 16-bit floating point CPU that can execute 50 million instructions per second using CMOS technology. It features a Harvard architecture with separate program and data buses. It has various on-chip memory blocks and peripherals. The CPU includes a parallel logic unit, central ALU, and auxiliary register arithmetic unit. It has advanced pipelining that enables simultaneous access of data and program.
- Author
- John cena
- Language
- EN