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Multiplying DAC Design for Image Compression by Hassan Farssi is a document available to read on EtoBox.
What is Multiplying DAC Design for Image Compression about?
This document discusses the design and analysis of subcircuits for a multiplying digital-to-analog converter (MDAC) used in artificial neural networks for image compression. Specifically, it presents the design of a current digital-to-analog converter (DAC), current reference, and operational amplifier subcircuits in 180nm CMOS technology for use in a MDAC. The operation of a previously proposed 5-bit R-2R ladder PMOS MDAC circuit is described. Simulation results using Cadence and HSPICE show that the desig
- Author
- Hassan Farssi
- Language
- EN