About this document
Clocking Architectures in ECEN720 by 陈晨 is a document available to read on EtoBox.
The document discusses clocking architectures and phase-locked loops (PLLs) for high-speed links. It describes common clock, forward clock, and embedded clock I/O architectures and their applications, limitations, and example circuits. It also provides an overview of PLL modeling and noise transfer functions, and discusses PLL applications such as frequency synthesis, skew cancellation, and clock recovery.
- Author
- 陈晨
- Language
- EN