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This paper introduces a time-interleaved SAR ADC capable of background timing skew calibration without needing a separate timing reference channel, achieving a conversion speed of 1 GS/s with 18.9 mW power consumption. The design incorporates a flash ADC to enhance speed and accuracy, achieving significant performance metrics such as 51.4 dB SNDR and 59.1 dB SFDR. The prototype, fabricated in a 65 nm CMOS process, demonstrates effective timing skew correction and power efficiency, making it suitable for hig

Author
Tuhin Karak
Language
EN

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