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Fast and Reconfigurable Sort-in-memory System Enabled by Memristors by Yu, Lianfeng; Tao, Yaoyu; Zhang, Teng; Wang, Zeyu; Wang, Xile; Pan, Zelun; Wang, Bowen; Jing, Zhaokun; Liu, Jiaxin; Li, Yuqi; Zhu, Yihang; Yan, Bonan; Yang, Yuchao is a scholarly article available to read on EtoBox.

What is Fast and Reconfigurable Sort-in-memory System Enabled by Memristors about?

Sorting is fundamental and ubiquitous in modern computing systems. Hardware sorting systems are built based on comparison operations with Von Neumann architecture, but their performance are limited by the bandwidth between memory and comparison units and the performance of complementary metal-oxide-semiconductor (CMOS) based circuitry. Sort-in-memory (SIM) based on emerging memristors is desired but not yet available due to comparison operations that are challenging to be implemented within memristive memory. Here we report fast and reconfigurable SIM system enabled by digit read (DR) on 1-transistor-1-resistor (1T1R) memristor arrays. We develop DR tree node skipping (TNS) that support variable data quantity and data types, and extend TNS with multi-bank, bit-slice and multi-level strategies to enable cross-array TNS (CA-TNS) for practical adoptions. Experimented on benchmark sorting datasets, our memristor-enabled SIM system presents up to 3.32x~7.70x speedup, 6.23x~183.5x energy efficiency improvement and 2.23x~7.43x area reduction compared with state-of-the-art sorting systems. We apply such SIM system for shortest path search with Dijkstra's algorithm and neural network infere

Author

Yu, Lianfeng; Tao, Yaoyu; Zhang, Teng; Wang, Zeyu; Wang, Xile; Pan, Zelun; Wang, Bowen; Jing, Zhaokun; Liu, Jiaxin; Li, Yuqi; Zhu, Yihang; Yan, Bonan; Yang, Yuchao

Published

2023

Language

EN