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What is SOC Test and Low Power Patterns about?

This document discusses system-on-chip (SOC) testing. It introduces SOC and built-in self-test (BIST), which uses linear feedback shift registers (LFSRs) to generate test patterns. It then describes a technique for low power test pattern generation using LP-LFSRs. The document simulations the standard LFSR and LP-LFSR techniques on benchmark circuits and compares their power consumption, finding that LP-LFSR reduces power. It concludes and discusses potential future work.

Author

Teja Patti

Language

EN