About this scholarly article

Proceedings of the 48th Design Automation Conference on - DAC '11 - A closed-form expression for estimating minimum operating voltage (V DDmin ) of CMOS logic gates by Fuketa, Hiroshi; Iida, Satoshi; Yasufuku, Tadashi; Takamiya, Makoto; Nomura, Masahiro; Shinohara, Hirofumi; Sakurai, Takayasu is a scholarly article available to read on EtoBox.

Author

Fuketa, Hiroshi; Iida, Satoshi; Yasufuku, Tadashi; Takamiya, Makoto; Nomura, Masahiro; Shinohara, Hirofumi; Sakurai, Takayasu

Publisher

ACM Press

Published

2011

Language

EN