About this document
8-Bit Left-Shift Register in Verilog by VIKRAM KUMAR is a document available to read on EtoBox.
The document describes an 8-bit left-shift register with the following specifications: - It has inputs for load, clock, shift, and 8-bit data_in - It has an 8-bit output data_out - On the rising edge of clock: - If load is 1, data_out is assigned the value of data_in - If load is 0 and shift is 0, data_out maintains its value - If load is 0 and shift is 1, data_out is left shifted by 1 bit using Verilog
- Author
- VIKRAM KUMAR
- Language
- EN