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19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings. - Online testable reversible logic circuit design using NAND blocks by Vasudevan, D.P.; Lala, P.K.; Parkerson, J.P. is a scholarly article available to read on EtoBox.
- Author
- Vasudevan, D.P.; Lala, P.K.; Parkerson, J.P.
- Publisher
- IEEE
- Published
- 2004
- Language
- EN
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